MSL3085BT【PDF 18/20 页】IC LED DRIVER 8 STRING

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Register Power-up Defaults

Register power-up default values are shown in Table 3.

Table 3. Atmel LED Driver-MSL3085 Register Power-up Defaults

REGISTER NAME

AND ADDRESS

POWER-UP CONDITION

REGISTERS INITIALIZED FROM EEPROM

D7

D6

D5

REGISTER DATA

D4 D3 D2

D1

D0 HEX

0x00

0x01

0x02

0x03

0x04

0x05

0x0F

0x10

0x11

0x12

0x20

0x21

0x22

0x23

0x24

0x25

0x26

0x27

STRINGEN0

STRINGEN1

CONFIG

FLTEN

STRFLTEN0

STRFLTEN1

OSCFREQ

FBOCTRL0

FBOCTRL1

FBOCTRL2

GSCCTRL

GSCCNTR

GSCMUL

GSCDIV

GSCMAX

PHICTRL

LED strings 0, 2, 4, 6, 9, 11, 12, and 14 enabled

String short circuit confirmation delay = 256μs

String current fold-back enabled

Device awake

FBO open circuit fault detect globally enabled

String open circuit fault detect globally enabled

LED short circuit fault detect globally enabled

GSC max fault detect globally disabled

PHI max fault detect globally disabled

I 2 C timeout enabled

Fault detection individually enabled

For all strings (0, 2, 4, 6, 9, 11, 12, and 14)

f osc = 20MHz

Current sink error confirmation delay = 2μs

FBO power supply correction delay = 4ms

Efficiency Optimizer auto-recalibration delay = 1s

Efficiency Optimizer headroom steps = 3

MOSFET current sink error detection enabled

Efficiency Optimizer auto-recalibration enabled

PWM settings used during auto-recalibration

PWM settings used during initial calibration

Efficiency Optimizer correction step size = 1 LSB (1μA)

Efficiency Optimizer initial calibration step size = 1 LSB

(1μA)

FBO outputs globally enabled

FBO1 open circuit detection enabled

FBO2 open circuit detection disabled

External signal at GSC is selected for input to the PWM

engine

GSC not internally synchronized to PHI

PWM drive synchronized to falling edge of external GSC

signal

GSC maximum count fault detect is disabled

although disabled, GSC max fault monitors f pGSC

Although disabled, internal GSC

Frequency f GGEN = 20MHz / (80 + 1) = 246kHz

GSC multiplexer output is multiplied by 4

(register setting + 1)

GSC multiplier output is divided by 1 (register setting + 1)

Although disabled, GSC max count is set to 174 clock

cycles

External signal at PHI selected for input to PWM engine

PWM engine is synchronized to the falling edge of PHI

PHI maximum count fault detect is disabled

Although disabled, PHI max count monitors f pPHI

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

1

1

0

0

1

1

0

1

0

0

0

1

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

0

0

1

0

0

1

1

0

0

1

1

0

0

1

0

0

1

0

0

0

0

0

0

0

1

1

0

0

1

0

1

1

0

0

0

0

0

0

1

0

0

1

0

1

1

1

0

1

0

0

0

0

0

0

0

0

1

0

0

0

1

0

1

0

1

0

0

1

1

0

0

0

1

0

1

0

0

1

0

1

1

1

0

0

1

0

1

0

0

0

1

0

0

0

0

55

5A

0D

27

55

5A

04

49

1A

03

00

50

00

03

00

AE

00

00

18

Atmel LED Driver-MSL3085

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